Generally, a semiconductor memory includes an input buffer for buffering an external input signal applied from an external chipset and outputting it as an internal input signal. For this input buffer, there are the following types of buffers: a single ended type buffer to perform a buffering operation using a voltage difference between an input signal and a constant reference voltage VREF; and a differential type buffer to perform a buffering operation using a voltage difference between two input signals which are out of phase with each other.
FIG. 1A is a circuit diagram illustrating a conventional differential type input buffer, and FIG. 1B is a diagram for explaining an operation of the input buffer of FIG. 1A.
As shown in FIGS. 1A and 1B, if an input signal IN becomes greater than an input signal INb (sections A and C in FIG. 1B), a node 1 becomes low and thus the conventional input buffer outputs a logic high signal. On the other hand, if the input signal INb becomes greater than the input signal IN (sections B and D in FIG. 1B), the node 1 becomes high and thus the input buffer outputs a logic low signal. However, the input buffer has a delay skew which is changed according to the change of a cross point of the input signals.
FIGS. 2A and 2B are diagrams for explaining the delay skew of the input buffer in FIG. 1A.
As illustrated in FIGS. 2A and 2B, in the conventional differential type input buffer, the delay of the buffer output BUF_OUT is changed according to the change of the cross point VIX where the input signals IN and INb meet. At a cross point +VIX where the cross point VIX becomes greater than a reference point 0, ½ VDD, since NMOS transistors within the input buffer operate in response to an input signal of high voltage level, the input buffer performs a buffering operation rapidly. By contrast, at a cross point −VIX where the cross point VIX becomes smaller, since the NMOS transistors operate in response to an input signal of low voltage level, the input buffer performs the buffering operation slowly.
As described above, the conventional differential type input buffer has a delay skew such that an operation speed of the input buffer is changed according to the change of the cross point VIX of the input signals.